ASIC / SOC Verification Engineer 9/8/2016

Confidential Company Santa Clara, CA

Company
Confidential Company
Job Classification
Full Time
Company Ref #
29680393
AJE Ref #
576120534
Location
Santa Clara, CA
Job Type
Regular

JOB DESCRIPTION

APPLY
JOB RESPONSIBILITIES:

Strong background in SOC verification using UVM, System verilog
Expert in C/C++ and Scripting using Perl
Minimum 5 years of experience
Experienced working on Video and Image processing is plus

PREFERRED EXPERIENCE : 5+

* Sound knowledge in Verilog / System verilog.
* Experience with verification methodology such UVM/VMM/OVM. UVM is preferred.
* UVM Testbench, coding and good understanding of design issues in RTL.
* Prior hands on experience on integration and debug of Full chip
* Environment is preferred.
* Experience in scripting .

SKILL SET / EXPERTISE: UVM and low power verification, testbench development.
NUMBER OF OPEN POSITIONS : 10
LOCATION : Santa Clara