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POST DATE 9/7/2016
END DATE 12/6/2016

Synopsys Sunnyvale, CA

Company
Synopsys
Job Classification
Full Time
Company Ref #
11835BR-Sunnyvale
AJE Ref #
576110500
Location
Sunnyvale, CA
Experience
Mid-Career (2 - 15 years)
Job Type
Regular
Education
Bachelors Degree

JOB DESCRIPTION

APPLY
The primary focus of a Formal Verification AC Specialist is to support the sale and adoption of the Synopsys formal verification products. Specialists are expected to possess in-depth knowledge of design for verification methodologies. They are expected to be able to articulate how to apply such techniques as assertions, constrained random stimulus and coverage to full chip verification. A Formal Verification consultant is also expected to have expertise in applying formal property verification methodologies to our customer s designs. You will be a formal property verification champion. You will provide insight and guidance on concepts, methodology and tool usage, enabling our customers to effectively apply Synopsys formal tools to their toughest verification problems. Activities include analysis of environment and setup, identification of appropriate design blocks and metrics, analysis of tool performance and problem complexity, and optimizing RTL, formal testbenches and environments for optimal tool performance.

Specialists support Account Managers to exceed quota along with providing sales support roles including product demonstrations, evaluations, and competitive benchmarking. Customer support roles include training, problem resolution and technical account management. Formal Verification Specialists are expected to participate in account planning, where they work as part of the account team to develop the Synopsys solution to customer problems by bringing their understanding of customers' needs and issues. They must be able to interact effectively with end-users at customer sites, as well as first level managers.

Requirements:


* BS in CS/EE with 10 years of experience, or MS in CS/EE with 8 years of experience. Experience should include verification using industry-standard hardware description languages (SystemVerilog/VHDL).

* Hands on experience applying Functional Coverage, Assertions, Formal Property Verification and Formal methods

* Experience developing Formal verification methodologies

* Excellent verbal and written presentation/communication skills are mandatory. Strong interest and understanding of design for verification methodologies is required.

* Customer sensitivity, the ability to multiplex many issues & set priorities and the desire to help customers exploit new technologies are essential for success in the position.

* Requires the ability to understand and explain related technical issues, thorough knowledge of company products, and all potential applications and associated languages.

* Excellent customer interface, negotiation, communication and planning skills. Ability to lead and manage complex tasks to achieve timely completion consistent with program schedule and cost constraints.
* Must be team focused and sales seasoned.