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IC Package Co-Design Engineer

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POST DATE 9/8/2016
END DATE 10/15/2016

Cirrus Logic Austin, TX

Austin, TX
AJE Ref #
Job Classification
Full Time
Job Type
Company Ref #
Entry Level (0 - 2 years)


This is a challenging position in a high volume, dynamic and fast paced environment, and will have a direct impact on business with external customers by helping create innovation that rocks. Products include top of the line Amps, Codecs and DSPs to name a few. The package design types are a wide variety from WLCSP to wirebond to flip chip. This is a chance to be part of a fast growing package design team supporting challenging customer expectations and a growing business.

Position Responsibilities

* Work tightly with Global Design (UK and US) I.C. and board teams to drive internal design of production and reliability package designs

* Drive continuous improvement processes to assure accuracy between the interface of the package to the die and PCB

* Assure accuracy by meeting customer s expectations and meeting Cirrus Logic design rules provided to subcontractors

* Utilize AutoCAD, GDS tools and Cadence SiP Layout tool to complete physical design and manufacturing validation solution for package design, including die bump array/BGA integration refinement using die information

* Work with OSATs to establish and maintain design rules for WLCSP, wire bond, and reliability packages

* Understand DFM checking and modification to improve substrate and assembly yield and prevent manufacturing issues

* Interface with IC designers, manufacturers and marketing teams to define package requirements from electrical, thermal, and mechanical point of view.

* Work with reliability teams to drive innovation

* Grow and promote automation within the package team

* Develop test vehicles that properly assess bump placement, PCB proximity effects, WLCSP RDL stack up and the like on final chip performance

* Act as a group contact for discussion and negotiation with product group on bump placement versus chip functional block location to create world-leading products

* Close collaboration with customers to resolve electrical issues between the piece part and PCB

Required Skills and Qualifications

* Bacherlor's of Science or higher in Mechanical or Electrical Engineering

* Experience with designing for manufacturability

* Knowledge of packaging technologies, materials, package substrate design and assembly rules

* Experienced Cadence SIP layout user

* Strong AutoCAD user

* Understanding of electrical simulation results on a package design

* Familiarity or willingness to learn Virtuoso operation using Unix workstations

Preferred Skills and Qualifications

* Conversant with PCB and Die mechanical layout tools (e.g. Allegro, Cadence)

* Multi-die, including stacked, final products

* Broad reading in the area of interest and the desire to continue that reading with access to the high quality company library resource, material properties knowledge

* As a leadership role, the role is responsible for various amounts of technical mentoring of others in the corporation. This may be 1:1 formal or informal conversations and more formal group settings

* Ability to communicate effectively across a broad skill set of English language speakers in order to help customers understand difficult concepts where the customer literally can be anywhere on the populated areas of earth

* Must be broadly curious and knowledgeable, and willing to doggedly pursue mastery of new technical concepts through self-learning or training opportunities available through company resources

* Electrical simulation skills

Individuals seeking employment at Cirrus Logic are considered without regards to race, color, religion, national origin, age, sex, marital status, ancestry, physical or mental disability, veteran status, or sexual orientation. You are being given the opportunity to provide the following information in order to help us comply with federal and state Equal Employment Opportunity/Affirmative Action record keeping, reporting, and other legal requirements.