Mixed Signal Verification Engineer

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POST DATE 9/8/2016
END DATE 10/8/2016

Confidential Company Portland, OR

Company
Confidential Company
Job Classification
Full Time
Company Ref #
29680312
AJE Ref #
576121299
Location
Portland, OR
Experience
Mid-Career (2 - 15 years)
Job Type
Regular
Education
Bachelors Degree

JOB DESCRIPTION

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In this role, the selected candidate will be responsible for defining and developing necessary validation infrastructure tests, checkers and occasional scripting in perl or unix shell to execute the validation plans to ensure functional correctness of the design. We are in need of 4-5 Mixed Signal Validation Engineers for outsource support, responsible for mixed signal validation in the pre-silicon environment.Work location is Intel Oregon, USAProject duration estimate: 12 months2 Candidates - 8-14 yrs exp3 Candidates - 4-7 yrs expDescription:Functional validation of products with both analog and digital components in them using digital and mixed signal simulation toolsDefining and developing necessary validation infrastructure tests, checkers and occasional scripting in perl or unix shell to execute the validation plans to ensure functional correctness of the designRead and interpret technical specs and create high quality technical documentationUnderstanding DUT specifications, digital logic and analog circuit implementation, defining validation strategy, creating test plansDocument validation plan and create appropriate software/content to execute to the plan as a guideMust have's:Either a BS or MS in Electrical Engineering, Computer Engineering or Electrical and Computer Engineering2yrs experience with basic analog, mixed signal circuits2yrs experience with digital logic design and simulation using Verilog/VHDL1yr experience in developing verification collateral using SVTB based OVM/UVM or Verilog/VHDL 1yr experience with high speed I/Os like DDR, PCI-express, USB or similar IO interfaces6mths experience with computer architecture6mths experience with scripting languages like Perl and/or Shell6mths experience with circuit simulation tools like Pspice and application of circuit analysis concepts2yrs experience with UNIX* or Linux*Preferred qualifications:6mths+ experience with Verilog-A/VHDL-A/AMS and mixed signal simulation tools like Cadence\* AMS, Mentor\* ADMS and/or their equivalent6mths+ industry experience in SOC/ASIC verification6mths+ experience in post-si debug and validationWorking knowledge of C/C++/SystemC and other high level languagesMixed signal circuits/validationHigh speed I/OsVerilog-A/VHDL-A/AMSCadence\* AMS, Mentor\* ADMS