Pre - Silicon Functional Validation Engineer - IV
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POST DATE 8/20/2016
END DATE 12/19/2016
JOB DESCRIPTIONPre-Silicon Functional Validation Engineer-IV- Hillsboro, OR
This is a senior pre-si validation engineer position. Responsibilities will include but not be limited to:
*Reviewing IP component specification, developing and executing full chip and/or cluster level validation plans
*Contributing to testbench and tools development, including scan support
*Debugging test and/or regression failures and working with the RTL design team to drive bug resolutions
*Developing and executing on GLS plans
*Working with the Product Development Engineering (PDE) team to help facilitate silicon characterization testing
*Providing technical guidance and mentoring junior engineers on the team
You should possess a Bachelor or a Master degree in Electrical Engineering with at least 8+ years of relevant industry experience.
*Previous verification experience with ARM based SoC, including AXI/ACE and APB bus protocols
*Previous experience working with VCS or other 3rd party simulators
*Previous experience using Verilog/System Verilog, VHDL, C++ as a verification language
*Previous experience with OVM/UVM verification methodologies
*Strong written/verbal communication skills are a must, as you will be working, influencing and collaborating with teams in distributed locations.