R&D Engineer IC Design 4 - SOC
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POST DATE 8/18/2016
END DATE 10/20/2016
Santa Clara, CA
JOB DESCRIPTIONJOB DESCRIPTION:
Verify architecture, micro-architecture, functionality and performance features of SOC components (such as PCIe, USB 3.0/2.0, SATA) of a state of the art ARM processor based System on Chip (SoC) with multi-core and multi-thread CPUs.
Own and build verification test bench environment.
Develop and execute a comprehensive verification plan for the various SOC components.
Collaborate with logic designers on RTL model debug, bug fixes, and integration.
BSCS/BSEE or MSCS/MSEE (preferred) or equivalent
Experience required is typically a BS degree and 8 years of experience, an MS degree and 5 years of experience or a PhD or equivalent.
Prior knowledge of the following areas: PCIe, USB 2.0/3.0 or SATA
Demonstrated knowledge and experience in programming System Verilog, SystemC, Specman or Vera, and C/C++
Strong verification skills, understanding of methodology (VMM, UVM/OVM, white-box, black-box, focused test, random testing, coverage), infrastructure (test bench).
Prior experience in ARM based SOC is a definite plus.
Prior experience with UNIX/Linux development environment: Shell/Perl scripting is a plus.
Self-motivated team player able to thrive in a fast-paced engineering environment
IF YOU ARE LOCATED OUTSIDE USA, PLEASE BE SURE TO FILL OUT A HOME ADDRESS AS THIS WILL BE USED FOR FUTURE CORRESPONDENCE.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability or protected veteran status.