SOC Frontend Design Flow Senior Designer
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POST DATE 9/9/2016
END DATE 11/29/2016
JOB DESCRIPTIONAPPLY JOB DESCRIPTION:
Frontend Flow senior architect: The candidate will work closely with a team of CAD engineers that build front-end design and verification flows. The candidate will help architect, develop, maintain and enhance flows for RTL design & verification for 16nm SOC process. The overall team responsibility includes automation of flows for RTL regression, power analysis, Design-For-Test capabilities, formal verification, synthesis and timing flows.
* 7-10 years of industry experience in chip design flow development
* Must have hands on scripting experience in Perl, TCL, C or Makefile.
* Working knowledge with industrial standard SOC design tools.
* Strong expertise in DFT, synthesis and static timing analysis flow.
* Require a deep understanding of the Front-End chip design process.
* Various technology node SoC tape-out experience required.
MS/BS Degree in Electrical engineering or Equivalent
IF YOU ARE LOCATED OUTSIDE USA, PLEASE BE SURE TO FILL OUT A HOME ADDRESS AS THIS WILL BE USED FOR FUTURE CORRESPONDENCE.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability or protected veteran status.