ASIC Design Verification Engineer - NEW Verification Environment

ASIC Design Verification Engineer - NEW Verification Environments!
For the ASIC Verification Engineer with impeccable analytical skills and attention to detail, Emulex has a full-time position for you. Bring your skills to our Roseville, CA office where your understanding of verification methodologies will transfer to our complex ASIC designs. Learn, Grow & Achieve!
-Opportunity to work on our flagship product product line
-Develop NEW verification environments.
-Collaborate with teams across the globe as Emulex takes its products to the next levelIdeal candidates have experience in creating test plans, writing test cases, and debugging logic. In this position, you will contribute your talents, education and experience to rapidly review and understand complex verification environments written in system Verilog.

Now is great time to grow your career and join the industry leader in converged networking solutions!

As Emulex's ASIC Verification Engineer you will play a major role verifying Emulex's next generation products. You should possess a strong expertise of troubleshooting and debugging complex digital designs.Skills You Bring to Emulex:
-8 years plus experience in ASIC Verification, ideally implementing block level
random simulation environment-In depth knowledge of System Verilog and VMM or UVM is acceptable.-Knowledge in VERA, SPECMAN, SystemC also helpful-Solid debugging skills-Great communication and technical leadership skills-Proficiency with VCS logic simulator-Ability and desire to learn new technologiesCandidates
should have a strong software-centric verification background and
experience developing verification environments. Ideal talents should
possess a high motivation level and work well within teams. If this is
you, apply today!

Requirements:
About the Company:
Emulex is the leader in converged networking solutions for the data center. Our Connectivity Continuum architecture provides intelligent networking services that transition today's infrastructure into tomorrow's unified network ecosystem. Emulex provides a single framework that intelligently connects every server, network and storage device within the data center. Through strategic collaboration and integrated partner solutions, Emulex provides its customers with industry leading business value, operational flexibility and strategic advantage. We attract and retain the best and brightest workforce by investing in the tools and environment to help you be productive and reach personal and professional goals. We promote a team environment that encourages individual thinking and leadership. Here, everybody counts. www.emulex.com

Opportunities Abound!
-ASIC Design Verification Engineer opportunities available in: Roseville, CA., Costa Mesa, CA. and Austin, TX

Related Keywords:
Verilog, ASIC Verification, RTL, VMM, System Verilog, C/C++, chip, chip-design, storage, SOC, VCS, debug, debugging, ASIC Design, ASIC