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Senior Staff Simulation Software Engineer*
Job Summary
Company Job ID
J6L7XFWQ4DD
Job Title
Senior Staff Simulation Software Engineer*
Company:
Xilinx Inc.
Location
US - CA, San Jose, 95101
AJE Reference Number
525747605
Job Start/End Date
not provided
Job Type
Regular
Job Classification
Full Time
Hours/Week
not provided
Salary Range
not provided N/A
Education
None Selected
Required Degree/Formal Training
not provided
Required Licenses/Certificates
not provided
Experience
Mid-Career (2 - 15 years)
Company Homepage
not provided

Job Title:Senior Staff Simulation Software Engineer* Location:San Jose, CA, USOrganization Name:Interactive Design Tools Senior Staff Simulation Software Engineer* Detailed Description Xilinx Inc. is looking for a talented, self-driven and motivated Software Engineer to be part of the Xilinx HDL Simulator (ISim) team. As a senior member of this high performance team, the selected candidate will be responsible for design and implementation of significant parts of VHDL, Verilog and SystemVerilog compilers for ISim. Job Requirements Required:BS in CS, EE or CE (MS or PhD with research work in compilers or multi-processing strongly preferred) 10+ years of software development experience with strong background in compilers, simulation kernel and/or EDA tools development Good understanding of one or more of VHDL, Verilog, or SystemVerilog HDL languages Experience in developing and supporting large-scale (million-line) software, including understanding usage model, writing functional specification, code design, implementation, testing, documentation, and customer support Strong background in computer algorithms and proficiency in C/C++ programming Knowledge of quality assurance practices, methodologies and procedures Excellent communication skills Demonstrated ability to work in a geographically distributed team environmentPreferred:Experience with HDL Simulator development Familiarity with a wide variety of compiler aspects including compiler infrastructure, code generation and compiler optimizations is a plus Experience with GNU compiler development, LLVM or writing paralled distributed software leveraging multicore CPUs Additional Details Applicants are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation. The information requested here is not gathered for employment decisions. It is used only for compliance with Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment. Vacancy Type Regular

A benefit package may or may not be available. Request specific information from the employer.
       
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