RTL Designers & Verification Engineers (DDRPHY)
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POST DATE 8/22/2020
END DATE 10/14/2020
Mountain View, CA
JOB DESCRIPTIONRTL Design Engineers & Verification Design Engineers
We re looking for both Digital Design Engineers as well as Verification Engineers to join the team.
Do either of these roles sound like a good role for you?
For these positions we re looking to hire a front-end engineer for the growing Synopsys DesignWare IP development team. You will be participating in the development of DDRPHY IP Architecture and Microarchitecture specifications for the IP. You will also be driving development efforts across geographic locations to create world class winning solutions. https://www.synopsys.com/designware-ip/interface-ip.html
Key Qualifications for the RTL Engineer:
* BS/MS in Electronics Engineering with minimum of 5 years of former ASIC frontend & behavioral modeling experience is required.
* Having previous direct work experience with DDR or DDRPHY would be a BIG plus for us specifically former experience with DDR Memory and DDRPHY architecture especially.
* Have strong communication, leadership, investigation, problem solving & analytical skills
* Have proficiency with Verilog RTL coding (LEC, CDC, DFT)
* Be well versed in interface timing budget & clock domain crossing design
* Having a familiarity with SoC designs and micro-Architecture is also a plus along with having knowledge of VCS, Co-sim, Conformal LEC is also a BIG advantage
Key Qualifications for the Verification Engineer:
* BSEE with 7+ years or MSEE with 5+ years of relevant verification experience is required
* Have a proficiency in Verilog, System Verilog, SV assertions and code coverage is required
* Ability to develop test benches to verify RTL, debug simulation failures, develop verification plans, and converge on coverage goals
* Experience with verification methodology such as UVM, Functional Verification is also required
* Have a working knowledge of high-speed interface protocols such as DDR, DFI, or memory subsystems
* Have former experience in Formal Verification is a also a BIG plus!
* You must be able to work independently across geographic regions with great interpersonal and collaboration skills
* Demonstrate good analysis and problem-solving skills
At Synopsys, we re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we re powering it all with the world s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips faster. We re the world s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance eliminating months off their project schedules.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.